91. In communication network security issues ‘Authentication’ deals with:

(a) Keeping information out of hands of unauthorized user

(b) Determining whom we are talking to before revealing sensitive information

(c) With the signatures

(d) To ensure the message received was really one sent and not something malicious

Answer: (b)

92. A channel of 3000 Hz bandwidth with a signal to thermal noise ratio of 30 dB. The maximum number of bits per second the channel can transmit without error will be:

(a) 30,000 bps

(b) 25,000 bps

(c) 20,000 bps

(d) 15,000 bps

Answer: (a)

93. In an Ethernet LAN of 10 Mbps for the maximum length of 2500 𝑚 and 4 repeaters, the smallest frame that can guarantee to work consists of:

(a) 500 bits

(b) 1000 bits

(c) 200 bits

(d) 2500 bits

Answer: (a)

94. In a PDH system, the output of the first level multiplexer DSI will be:

(a) 1.048 Mbps

(b) 1.544 Mbps

(c) 2.048 Mbps

(d) 2.544 Mbps

Answer: (b)

95. In a GSM cellular network, the 148 data frame starts and ends with three 0 bits. The purpose of these three bits is for:

(a) Adding the zero padding to make frame of perfect size

(b) Balancing of 1 and 0 in the data frame

(c) Frame delineation

(d) Guarding the frame

Answer: (c)

96. Which of the following functional architecture of a GSM system are correct?

1. Radio Sub System (RSS)

2. Networking and Switching Sub-system (NSS)

3. Operation Sub System (OSS)

4. Global Network Sub System (GNSS)

(a) 1, 2 and 4 only

(b) 1, 3 and 4 only

(c) 2, 3 and 4 only

(d) 1, 2 and 3 only

Answer: (d)

97. When the microprocessor receives an interrupt request, it finishes the instruction it is executing and then jumps to:

(a) IR

(b) ACC

(c) SP

(d) ISR

Answer: (d)

98. Which input notifies MPU that another device (DMA) wants to use the address and data buses for data transfer?

Answer: (b)

99. In a step index fibre the refractive index of core n1=1.48 and that of cladding n2=1.45. The numerical apparture of the fibre will be nearly:

(a) 0.3

(b) 0.5

(c) 0.7

(d) 0.9

Answer: (a)

100. DMA Module can communicate with CPU through:

(a) Interrupt

(b) Cycle stealing

(c) Branch instruction

(d) None of these

Answer: (b)